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  1 ? an1454.0 caution: these devices are sensitive to electrosta tic discharge; follow proper ic handling procedures. 1-888-intersil or 1-888-468-3774 | intersil (and design) is a registered trademark of intersil americas inc. copyright intersil americas inc. 2009. all rights reserved all other trademarks mentioned are the property of their respective owners. ISL9440BEVAL1Z: triple pwm step-down synchronous buck controller and one ldo ISL9440BEVAL1Z evaluation board the ISL9440BEVAL1Z evaluat ion board features the isl9440b. the isl9440b is quad-output controller that integrates three pwm synchr onous buck controllers and one low-dropout linear regulator controller. then isl9440b offers programmable soft-start, i ndependent enable functions and integrates ov/oc/ot protecti on. the current mode control architecture and internal compensation network keep peripheral components to a minimum. the strong gate drivers of the isl9440b are capable of driving 20a current for pwm1 and pwm2 and 15a for pwm3. table 1 shows the difference in terms of isl944xx family features. the ISL9440BEVAL1Z is easy to set up to evaluate the performance of the isl9440b. please refer to the ?electrical specifications? for typical performance summary. table 1. features of isl944x family part number early warning switching frequency (khz) soft-starting time (ms) isl9440 yes 300 1.7 isl9440a yes 600 1.7 isl9441 no 300 1.7 isl9440b yes 300 programmable isl9440c yes 600 programmable electrical specifications recommended operation conditions, unless otherwise not ed. refer to schematic and typical performance curves. parameter test conditions min typ max units v in all outputs are in regulation 15 19 23 v v out 1 4.85 5.0 5.15 v v out 2 3.25 3.32 3.4 v v out 3 11.64 12.0 12.36 v v out 4 2.47 2.50 2.58 v pwm1 rated current v in = 19v, t a = +25c, no forced airflow, all three pwm outputs are fully loaded 15 18 a pwm2 rated current 15 18 a pwm3 rated current 12 14 a ldo rated current r7 = 0 , r4 is not populated 0.8 1.0 a v out 1 peak-to-peak ripple v in = 23v, all three pwm outputs are fully loaded, oscilloscope is wi th full bandwidth. 83 mv p-p v out 2 peak-to-peak ripple 61 mv p-p v out 3 peak-to-peak ripple 109 mv p-p application note september 25, 2009
2 an1454.0 september 25, 2009 what?s insides the evaluation board kit contains the following materials: ? the ISL9440BEVAL1Z ? the isl9440b, isl9440c datasheet ? this eval kit document recommended equipment the following materials are recommended to perform testing: ? 0v to 24v power supply with at least 20a source current capability ? three electronics loads capable of sinking current up to 20a ? digital multimeters (dmms) ? 100mhz quad-trace oscilloscope ? signal generator (for load transient tests) quick set-up guide 1. ensure that the circuit is co rrectly connected to the supply and electronics loads prior to applying any power. please refer to figure 1 for proper set-up. 2. connect jumpers j3, j4 and j5 in the enx positions. 3. turn on the power supply 4. adjust input voltage v in within the specified range and observe output voltage. the output voltage variation should be within 3%. 5. adjust load current within the specified range and observe output voltage. the output voltage variation should be within 3%. 6. use oscilloscope to observe output voltage ripple and phase node ringing. for accurate measurement, refer to figure 2 for proper test set-up. figure 1. proper test set-up a + _ + _ + - v + _ v + _ v v + _ v + _ v + - vin iin vout1 vout2 a + - iout1 load + - vout3 + - a + - iout3 a + - load load v application note 1454
3 an1454.0 september 25, 2009 load transient circuit set-up 1. select a dpak n channel mosfet with vdss breakdown > 20v. 2. install the load transient circuit as indicated on the schematic. refer to figure 3 for details. 3. r12, r14, r16 are 10k resistors for discharging the mosfet gates. 4. r13, r15 and r17 are current sensing resistors to monitor the load step. for accurate measurement, please use 5% tolerance sensing resistor or better. to alleviate thermal stress, use 0.1 or smaller resistance. the resistance of the sensing resi stors sets the current scale on the oscilloscope. 5. apply pulse square waveform to the istep_clk1, istep_clk2 and istep_clk3. the duty cycle of the pulse waveform should be small (<5%) to limit thermal stress on current sensing re sistor and the mosfets (q8, q9 and q10 6. the amplitude of the clock sets the current step amplitude. adjust the clock amplitude and slew rate to set the current step and slew rate. 7. monitor overshoot and un dershoot at corresponding output. figure 2. proper probe set-up to measure output ripple and phase node ringing. output cap or mosfet output cap or mosfet output cap or mosfet figure 3. load transient circuit for pwm1 j17 ist ep_ clk1 1 2 r15 opt, 0.01 r14 opt, 10k j18 istep1 1 2 q10 opt, sud50n03-16p typical evaluation board performance curves v in = 9v, unless otherwise specified. figure 4. pwm1 efficiency vs load (v o = 5.0v) figure 5. pwm2 efficiency vs load (v o = 3.3v) 60 65 70 75 80 85 90 95 100 0 4 6 8 10 12 14 16 load current (a) efficiency (%) v in = 23vdc 2 v in = 19vdc v in = 16vdc 60 65 70 75 80 85 90 95 100 0 8 10 12 14 16 load current (a) efficiency (%) 246 v in = 16vdc v in = 19vdc v in = 23vdc application note 1454
4 an1454.0 september 25, 2009 figure 6. pwm3 efficiency vs load (v o = 12v) figure 7. pwm1 output ripple under max load (v in = 23v, i o1 = i o2 = 15a, i o3 = 12a, full bandwidth figure 8. pwm2 output ripple under max load (v in = 23v, i o1 = i o2 = 15a, i o3 = 12a, full bandwidth figure 9. pwm3 output ripple under max load (v in = 23v, i o1 = i o2 = 15a, i o3 = 12a, full bandwidth figure 10. pwm1 load transient response (load step from 3.75a to 11.25a figure 11. pwm2 load transient response (load step from 3.75a to 11.25a typical evaluation board performance curves v in = 9v, unless otherwise specified. (continued) 60 65 70 75 80 85 90 95 100 0 4 8 10 12 14 load current (a) efficiency (%) 26 v in = 16vdc v in = 23vdc v in = 19vdc v out1 (ac), 50mv/div 2.0 s /div v out2 (ac), 50mv/div 2.0 ?s /di v out3 (ac), 50mv/div 2.0 ?s /di v out1 (ac), 100mv/div i step , 5.0a/div 50 s /div v out2 (ac), 100mv/div i step , 5.0a/div 50 s /div application note 1454
5 an1454.0 september 25, 2009 figure 12. pwm3 load t ransient response (load s tep from 3a to 9a) typical evaluation board performance curves v in = 9v, unless otherwise specified. (continued) v out3 (ac), 200mv/div i step , 5.0a/div 50 ?s /di application note 1454
6 an1454.0 september 25, 2009 schematic ti t l e size do cum en t numbe r re v dat e: sh eet of rev 0. 0 2 isl9440b high current tripple vout ev board cu st om 11 mon day , ja nua ry 26 , 200 9 vo1 vin css3 22n fb2 cp3 opt l oad tran sien t ci rcui t 2 ph2 j1 4 istep_ clk2 1 2 vfb1 vo2 j7 1 q1 op t co1 2 opt v01- j1 2 1 1 2 2 3 3 c2 o pt v02 + cb20.22u 16v cff1 220p ci n7 10 u 35 v en3 ql1 rjk03 30d pb rl3 1.6 cl3 820 p vo1 r13 op t, 0. 01 r1 7 op t, 0 .1 j9 1 ldofb lg2 r5 4 7 ena ble d j10 1 q7 opt ug 2 tp 11 ext. vcc 1 tp3 pgood 1 vo2 ql2 rjk0 330 dpb ex tv c c r9 21. 5k 1% cp2 opt v03 + c1 0. 22u q4 visha y , p c han nel mosfet, si4423dy g 4 s1 1 s2 2 s3 3 d1 5 d2 6 d3 7 d4 8 co2 2 330 u 6.3 v ena bl e d cp1 opt co 24 10 u 10 v x5 r q2 op t tp 15 vo 4 1 co2 3 10 u 10 v ci n5 op t 35v v02- ena bl e d j11 1 r2 20 k 1% cf in1 0 .47 u 35v ug3 cin4 10u 35v co 31 op t tp 4 rst 1 12v @ 12a p good cin 1 100 u 35v disabled qu 3 rj k0 332 dpb tp 16 gnd 1 tp 7 vo 2 1 j4 en3 1 1 2 2 3 3 tp 8 gnd 1 j17 istep_c lk1 1 2 r15 opt, 0. 01 di s a b le d j1 1 r14 opt, 10k vo 3 j18 istep1 1 2 ci n9 10 u 35 v q10 opt, sud50n03-16p j5 en2 1 1 2 2 3 3 v03 - disabled css2 22 n tp10 gnd 1 tp 9 vo3 1 vi n r10 10k 1% co11 330 u 6.3 v s any o, 6t p f3 30m 9l co1 3 10 u 10 v co14 10u 10v ro c2 16 9k co 15 33 0u 6. 3v vin vo 2 cff2 220p cin10 1 00u 35v u1 isl9440b isen1 1 pgoo d 2 vcc_ 5v 3 vin 4 en/ss1 5 fb1 6 ocs e t1 7 rst_ n 8 g4 9 ldo fb 10 sgnd 11 ocset2 12 fb 2 13 en/ss2 14 oc se t 3 15 fb3 16 en/ ss3 17 isen3 18 phase3 19 bo o t3 20 ugate3 21 lgate3 22 pgnd 23 isen2 24 ph ase2 25 boot 2 26 ugat e2 27 lgat e 2 28 lgate1 29 ugat e1 30 bo o t 1 31 phase1 32 pgnd (pad) 33 lg3 tp 19 gnd 1 ext . v cc r12 opt, 10 k int . v cc tp 1 vin 1 rl1 1.6 cl1 82 0p tp 2 gnd 1 5v @ 15a vo1 ci n3 10u 35v cff3 3 30p cin6 10u 35v 3.3v @ 14a+1 a tp 12 en1 1 cin 8 10u 35v rl2 1.6 cl2 82 0p tp 5 vo1 1 tp 6 gnd 1 fb 3 vi n+ ci n2 10 0u 35 v cvcc1 4.7u 10v vo3 q6 op t tp 17 gn d 1 en 2 vcc 5v r3 140 k 1% r8 3 4k 1% j2 1 lg2 roc1 1 69k ph3 j8 1 co41 10u q5 opt co21 opt cb10.22u 16v tp13 en 3 1 roc3 169 k cin11 10u 35v ql3 rjk0330dpb r1 10 5k 1% qu2 rjk03 05dpb j3 en1 1 1 2 2 3 3 co 32 15 0u 16 v co 34 10 u 16 v co3 3 10 u 16 v 2.5v @ 1a co3 5 150 u 16v sany o, 16 s vp 15 0mx l oad tran sien t ci rcui t 3 j1 5 istep_ clk3 1 2 r18 op t, 0. 1 r16 opt, 10k ug1 tp14 en2 1 j16 istep3 1 2 q9 o pt , sud 50n 03- 16p tp 18 gn d 1 vi n- rpg1 10 0k q3 op t l1 2 .2u ihl p5 050 fd er2r2 m01 r11 10. 7k 1% ph1 co 42 1 50u 6. 3v s any o, 6t p e1 50m az b 16v to 23v cb3 0 .2 2u 16 v r4 o pt r7 0 j6 1 rf i n1 13 css1 22n rs en1 2k j1 3 ist ep2 1 2 qu1 r jk030 5dpb q8 o pt, su d50 n03- 16 p co 25 33 0u 6. 3v s any o, 6t p f3 30m 9l en gine er: ma njing xie rse n3 1. 69 k l2 1.5u ih lp 505 0f de r1r 5m0 1 l3 3.3u ih lp 505 0f de r3r 3m0 1 v01+ lg 1 rsen 2 2.0 k en 1 svin r6 10k 1% application note 1454
7 an1454.0 september 25, 2009 table 2. bill of materials item qty part reference value description part number manufacturer 1 1 c1 0.22f 2 3 cb1, cb2, cb3 0.22ff ceramic caps, x5r, 16v avx, tdk, murata 3 1 cfin1 0.47f ceramic caps, x5r, 35v avx, tdk, murata 4 3 cin1, cin2, cin11 150f alum. elec. caps, 35v panasonic 5 6 cin3, cin4, cin6, cin7, cin8, cin9 10f ceramic caps, x5r, 35v avx, tdk, murata 6 2 co11, co12, co21, co22 330f poscap, 6.3v, esr 9m 6tpf330m9l sanyo 7 5 co13, co14, co23, co24, co41 10f ceramic caps, 0805, x5r, 6.3v avx, tdk, murata 8 2 co31, co32 150f sanyo, oscon, 16v sanyo 9 2 co33, co34 10f ceramic caps, x5r, 25v avx, tdk, murata 10 1 co42 150f poscap, 6.3v 4tpe100mzb sanyo 11 1 cvcc1 4.7f ceramic caps, x5r, 16v avx, tdk, murata 12 2 cff1, cff2 220pf ceramic caps, np0, 50v generic 13 1 cff3 330pf ceramic caps, np0, 50v generic 14 3 css1, css2, css3 22nf ceramic caps, np0, 50v generic 15 1 l1 2.2h power inductor ihlp5050fder2r2m01 vishay 16 1 l2 1.5h power inductor ihlp5050fder1r5m01 vishay 17 1 l3 3.3h power inductor ihlp5050fder3r3m01 vishay 18 3 ql1, ql2, ql3 n mosfet, 30v rjk0330dpb renesas 19 2 qu1, qu2 n mosfet, 30v rjk0305dpb renesas 20 1 qu3 n mosfet, 30v rjk0332dpb renesas 21 1 q4 p mosfet, 20v si4423dy vishay 22 1 r1 105k resistor, 0603, 1/16w generic 23 1 r2 20k resistor, 0603, 1/16w generic 24 2 r6, r10 10k resistor, 0603, 1/16w generic 25 1 r3 140k resistor, 0603, 1/16w generic 26 1 r5 47 resistor, 0603, 1/16w generic 27 1 r8 34k resistor, 0603, 1/16w generic 28 1 r9 21.5k resistor, 0603, 1/16w generic 29 1 r11 10.7k resistor, 0603, 1/16w generic 30 1 rfin1 4.7 resistor, 0603, 1/16w generic 31 3 roc1, roc2, roc3 169k resistor, 0603, 1/16w generic 32 1 rpg1 100k resistor, 0603, 1/16w generic 33 2 rsen1, rsen2 2.0k resistor, 0603, 1/16w generic 34 1 rsen3 1.69k resistor, 0603, 1/16w generic 35 1 u1 quad output controller isl9440b intersil optional components or resistor jumpers 1 1 c2 opt generic 2 3 cl1, cl2, cl3 820pf ceramic caps, 0805 generic 3 0 cin11,cin5 opt generic 4 0 co15, co25, co35 opt generic application note 1454
8 intersil corporation reserves the right to make changes in circuit design, software and/or specifications at any time without n otice. accordingly, the reader is cautioned to verify that the application note or technical brief is current before proceeding. for information regarding intersil corporation and its products, see www.intersil.com an1454.0 september 25, 2009 5 0 cp1, cp2, cp3 opt generic 6 0 q1, q2, q3, q5, q6, q7 opt n mosfet, 30v 7 3 rl1, rl2, rl3 1.6 resistor, 0805, 1/8w generic 8 0 r4 opt generic 9 1 r7 0 resistor jumper generic evaluation board hardware 1 8 j1, j2, j6, j7, j8, j9, j10, j11 big lug 2 1 j3, j4,j5, j12 3 head jumper 3 15 tp1 ~ tp15 test point 4 4 stand off table 2. bill of materials (continued) item qty part reference value description part number manufacturer application note 1454
9 an1454.0 september 25, 2009 ISL9440BEVAL1Z pcb layout figure 13. top components application note 1454
10 an1454.0 september 25, 2009 figure 14. top layer etch ISL9440BEVAL1Z pcb layout (continued) application note 1454
11 an1454.0 september 25, 2009 figure 15. second layer etch ISL9440BEVAL1Z pcb layout (continued) application note 1454
12 an1454.0 september 25, 2009 figure 16. third layer etch ISL9440BEVAL1Z pcb layout (continued) application note 1454
13 an1454.0 september 25, 2009 figure 17. bottom layer etch (mirrored) ISL9440BEVAL1Z pcb layout (continued) application note 1454
14 an1454.0 september 25, 2009 figure 18. bottom components (mirrored) ISL9440BEVAL1Z pcb layout (continued) application note 1454


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